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DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE

列挙型
基底型u4

メンバー 14

名前10進16進
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz00x0
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz10x1
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz20x2
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz30x3
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz40x4
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz50x5
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz60x6
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz70x7
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz80x8
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz90x9
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz100xA
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz110xB
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz120xC
DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz130xD

各言語での定義

列挙メンバーの定義。HSP タブは #define global(値は16進)。

typedef enum DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE : unsigned int {
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz = 0,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz = 1,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz = 2,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz = 3,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz = 4,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz = 5,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz = 6,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz = 7,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz = 8,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz = 9,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz = 10,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz = 11,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz = 12,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz = 13
} DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE;
public enum DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE : uint
{
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz = 0,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz = 1,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz = 2,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz = 3,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz = 4,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz = 5,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz = 6,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz = 7,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz = 8,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz = 9,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz = 10,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz = 11,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz = 12,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz = 13,
}
Public Enum DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE As UInteger
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz = 0
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz = 1
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz = 2
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz = 3
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz = 4
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz = 5
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz = 6
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz = 7
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz = 8
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz = 9
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz = 10
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz = 11
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz = 12
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz = 13
End Enum
import enum

class DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE(enum.IntEnum):
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz = 0
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz = 1
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz = 2
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz = 3
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz = 4
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz = 5
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz = 6
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz = 7
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz = 8
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz = 9
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz = 10
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz = 11
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz = 12
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz = 13
// DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz: u32 = 0;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz: u32 = 1;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz: u32 = 2;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz: u32 = 3;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz: u32 = 4;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz: u32 = 5;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz: u32 = 6;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz: u32 = 7;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz: u32 = 8;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz: u32 = 9;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz: u32 = 10;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz: u32 = 11;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz: u32 = 12;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz: u32 = 13;
// DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE
const (
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz uint32 = 0
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz uint32 = 1
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz uint32 = 2
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz uint32 = 3
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz uint32 = 4
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz uint32 = 5
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz uint32 = 6
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz uint32 = 7
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz uint32 = 8
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz uint32 = 9
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz uint32 = 10
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz uint32 = 11
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz uint32 = 12
	DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz uint32 = 13
)
const
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz = 0;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz = 1;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz = 2;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz = 3;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz = 4;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz = 5;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz = 6;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz = 7;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz = 8;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz = 9;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz = 10;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz = 11;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz = 12;
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz = 13;
// DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz: u32 = 0;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz: u32 = 1;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz: u32 = 2;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz: u32 = 3;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz: u32 = 4;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz: u32 = 5;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz: u32 = 6;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz: u32 = 7;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz: u32 = 8;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz: u32 = 9;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz: u32 = 10;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz: u32 = 11;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz: u32 = 12;
pub const DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz: u32 = 13;
const
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz* = 0
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz* = 1
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz* = 2
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz* = 3
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz* = 4
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz* = 5
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz* = 6
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz* = 7
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz* = 8
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz* = 9
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz* = 10
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz* = 11
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz* = 12
  DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz* = 13
enum DEVPROP_PCIROOTBUS_CURRENTSPEEDANDMODE : uint {
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz = 0,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz = 1,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz = 2,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz = 3,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz = 4,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz = 5,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz = 6,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz = 7,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz = 8,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz = 9,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz = 10,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz = 11,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz = 12,
    DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz = 13,
}
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_33Mhz 0x0
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_Conventional_66Mhz 0x1
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_66Mhz      0x2
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_100Mhz     0x3
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_133Mhz     0x4
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_66Mhz  0x5
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_100Mhz 0x6
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_Mode1_ECC_133Mhz 0x7
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_66Mhz  0x8
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_100Mhz 0x9
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_266_Mode2_133Mhz 0xA
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_66Mhz  0xB
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_100Mhz 0xC
#define global DevProp_PciRootBus_CurrentSpeedAndMode_Pci_X_533_Mode2_133Mhz 0xD