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DEVICE_POWER_CAPABILITIES

列挙型フラグ

基底型u4

メンバー 19

名前	10進	16進
PDCAP_D0_SUPPORTED	1	0x1
PDCAP_D1_SUPPORTED	2	0x2
PDCAP_D2_SUPPORTED	4	0x4
PDCAP_D3_SUPPORTED	8	0x8
PDCAP_WAKE_FROM_D0_SUPPORTED	16	0x10
PDCAP_WAKE_FROM_D1_SUPPORTED	32	0x20
PDCAP_WAKE_FROM_D2_SUPPORTED	64	0x40
PDCAP_WAKE_FROM_D3_SUPPORTED	128	0x80
PDCAP_WARM_EJECT_SUPPORTED	256	0x100
PDCAP_S0_SUPPORTED	65536	0x10000
PDCAP_S1_SUPPORTED	131072	0x20000
PDCAP_S2_SUPPORTED	262144	0x40000
PDCAP_S3_SUPPORTED	524288	0x80000
PDCAP_WAKE_FROM_S0_SUPPORTED	1048576	0x100000
PDCAP_WAKE_FROM_S1_SUPPORTED	2097152	0x200000
PDCAP_WAKE_FROM_S2_SUPPORTED	4194304	0x400000
PDCAP_WAKE_FROM_S3_SUPPORTED	8388608	0x800000
PDCAP_S4_SUPPORTED	16777216	0x1000000
PDCAP_S5_SUPPORTED	33554432	0x2000000

各言語での定義

列挙メンバーの定義。HSP タブは #define global(値は16進)。

typedef enum DEVICE_POWER_CAPABILITIES : unsigned int {
    PDCAP_D0_SUPPORTED = 1,
    PDCAP_D1_SUPPORTED = 2,
    PDCAP_D2_SUPPORTED = 4,
    PDCAP_D3_SUPPORTED = 8,
    PDCAP_WAKE_FROM_D0_SUPPORTED = 16,
    PDCAP_WAKE_FROM_D1_SUPPORTED = 32,
    PDCAP_WAKE_FROM_D2_SUPPORTED = 64,
    PDCAP_WAKE_FROM_D3_SUPPORTED = 128,
    PDCAP_WARM_EJECT_SUPPORTED = 256,
    PDCAP_S0_SUPPORTED = 65536,
    PDCAP_S1_SUPPORTED = 131072,
    PDCAP_S2_SUPPORTED = 262144,
    PDCAP_S3_SUPPORTED = 524288,
    PDCAP_WAKE_FROM_S0_SUPPORTED = 1048576,
    PDCAP_WAKE_FROM_S1_SUPPORTED = 2097152,
    PDCAP_WAKE_FROM_S2_SUPPORTED = 4194304,
    PDCAP_WAKE_FROM_S3_SUPPORTED = 8388608,
    PDCAP_S4_SUPPORTED = 16777216,
    PDCAP_S5_SUPPORTED = 33554432
} DEVICE_POWER_CAPABILITIES;

[Flags]
public enum DEVICE_POWER_CAPABILITIES : uint
{
    PDCAP_D0_SUPPORTED = 1,
    PDCAP_D1_SUPPORTED = 2,
    PDCAP_D2_SUPPORTED = 4,
    PDCAP_D3_SUPPORTED = 8,
    PDCAP_WAKE_FROM_D0_SUPPORTED = 16,
    PDCAP_WAKE_FROM_D1_SUPPORTED = 32,
    PDCAP_WAKE_FROM_D2_SUPPORTED = 64,
    PDCAP_WAKE_FROM_D3_SUPPORTED = 128,
    PDCAP_WARM_EJECT_SUPPORTED = 256,
    PDCAP_S0_SUPPORTED = 65536,
    PDCAP_S1_SUPPORTED = 131072,
    PDCAP_S2_SUPPORTED = 262144,
    PDCAP_S3_SUPPORTED = 524288,
    PDCAP_WAKE_FROM_S0_SUPPORTED = 1048576,
    PDCAP_WAKE_FROM_S1_SUPPORTED = 2097152,
    PDCAP_WAKE_FROM_S2_SUPPORTED = 4194304,
    PDCAP_WAKE_FROM_S3_SUPPORTED = 8388608,
    PDCAP_S4_SUPPORTED = 16777216,
    PDCAP_S5_SUPPORTED = 33554432,
}

<Flags>
Public Enum DEVICE_POWER_CAPABILITIES As UInteger
    PDCAP_D0_SUPPORTED = 1
    PDCAP_D1_SUPPORTED = 2
    PDCAP_D2_SUPPORTED = 4
    PDCAP_D3_SUPPORTED = 8
    PDCAP_WAKE_FROM_D0_SUPPORTED = 16
    PDCAP_WAKE_FROM_D1_SUPPORTED = 32
    PDCAP_WAKE_FROM_D2_SUPPORTED = 64
    PDCAP_WAKE_FROM_D3_SUPPORTED = 128
    PDCAP_WARM_EJECT_SUPPORTED = 256
    PDCAP_S0_SUPPORTED = 65536
    PDCAP_S1_SUPPORTED = 131072
    PDCAP_S2_SUPPORTED = 262144
    PDCAP_S3_SUPPORTED = 524288
    PDCAP_WAKE_FROM_S0_SUPPORTED = 1048576
    PDCAP_WAKE_FROM_S1_SUPPORTED = 2097152
    PDCAP_WAKE_FROM_S2_SUPPORTED = 4194304
    PDCAP_WAKE_FROM_S3_SUPPORTED = 8388608
    PDCAP_S4_SUPPORTED = 16777216
    PDCAP_S5_SUPPORTED = 33554432
End Enum

import enum

class DEVICE_POWER_CAPABILITIES(enum.IntFlag):
    PDCAP_D0_SUPPORTED = 1
    PDCAP_D1_SUPPORTED = 2
    PDCAP_D2_SUPPORTED = 4
    PDCAP_D3_SUPPORTED = 8
    PDCAP_WAKE_FROM_D0_SUPPORTED = 16
    PDCAP_WAKE_FROM_D1_SUPPORTED = 32
    PDCAP_WAKE_FROM_D2_SUPPORTED = 64
    PDCAP_WAKE_FROM_D3_SUPPORTED = 128
    PDCAP_WARM_EJECT_SUPPORTED = 256
    PDCAP_S0_SUPPORTED = 65536
    PDCAP_S1_SUPPORTED = 131072
    PDCAP_S2_SUPPORTED = 262144
    PDCAP_S3_SUPPORTED = 524288
    PDCAP_WAKE_FROM_S0_SUPPORTED = 1048576
    PDCAP_WAKE_FROM_S1_SUPPORTED = 2097152
    PDCAP_WAKE_FROM_S2_SUPPORTED = 4194304
    PDCAP_WAKE_FROM_S3_SUPPORTED = 8388608
    PDCAP_S4_SUPPORTED = 16777216
    PDCAP_S5_SUPPORTED = 33554432

// DEVICE_POWER_CAPABILITIES (flags)
pub const PDCAP_D0_SUPPORTED: u32 = 1;
pub const PDCAP_D1_SUPPORTED: u32 = 2;
pub const PDCAP_D2_SUPPORTED: u32 = 4;
pub const PDCAP_D3_SUPPORTED: u32 = 8;
pub const PDCAP_WAKE_FROM_D0_SUPPORTED: u32 = 16;
pub const PDCAP_WAKE_FROM_D1_SUPPORTED: u32 = 32;
pub const PDCAP_WAKE_FROM_D2_SUPPORTED: u32 = 64;
pub const PDCAP_WAKE_FROM_D3_SUPPORTED: u32 = 128;
pub const PDCAP_WARM_EJECT_SUPPORTED: u32 = 256;
pub const PDCAP_S0_SUPPORTED: u32 = 65536;
pub const PDCAP_S1_SUPPORTED: u32 = 131072;
pub const PDCAP_S2_SUPPORTED: u32 = 262144;
pub const PDCAP_S3_SUPPORTED: u32 = 524288;
pub const PDCAP_WAKE_FROM_S0_SUPPORTED: u32 = 1048576;
pub const PDCAP_WAKE_FROM_S1_SUPPORTED: u32 = 2097152;
pub const PDCAP_WAKE_FROM_S2_SUPPORTED: u32 = 4194304;
pub const PDCAP_WAKE_FROM_S3_SUPPORTED: u32 = 8388608;
pub const PDCAP_S4_SUPPORTED: u32 = 16777216;
pub const PDCAP_S5_SUPPORTED: u32 = 33554432;

// DEVICE_POWER_CAPABILITIES
const (
	PDCAP_D0_SUPPORTED uint32 = 1
	PDCAP_D1_SUPPORTED uint32 = 2
	PDCAP_D2_SUPPORTED uint32 = 4
	PDCAP_D3_SUPPORTED uint32 = 8
	PDCAP_WAKE_FROM_D0_SUPPORTED uint32 = 16
	PDCAP_WAKE_FROM_D1_SUPPORTED uint32 = 32
	PDCAP_WAKE_FROM_D2_SUPPORTED uint32 = 64
	PDCAP_WAKE_FROM_D3_SUPPORTED uint32 = 128
	PDCAP_WARM_EJECT_SUPPORTED uint32 = 256
	PDCAP_S0_SUPPORTED uint32 = 65536
	PDCAP_S1_SUPPORTED uint32 = 131072
	PDCAP_S2_SUPPORTED uint32 = 262144
	PDCAP_S3_SUPPORTED uint32 = 524288
	PDCAP_WAKE_FROM_S0_SUPPORTED uint32 = 1048576
	PDCAP_WAKE_FROM_S1_SUPPORTED uint32 = 2097152
	PDCAP_WAKE_FROM_S2_SUPPORTED uint32 = 4194304
	PDCAP_WAKE_FROM_S3_SUPPORTED uint32 = 8388608
	PDCAP_S4_SUPPORTED uint32 = 16777216
	PDCAP_S5_SUPPORTED uint32 = 33554432
)

const
  PDCAP_D0_SUPPORTED = 1;
  PDCAP_D1_SUPPORTED = 2;
  PDCAP_D2_SUPPORTED = 4;
  PDCAP_D3_SUPPORTED = 8;
  PDCAP_WAKE_FROM_D0_SUPPORTED = 16;
  PDCAP_WAKE_FROM_D1_SUPPORTED = 32;
  PDCAP_WAKE_FROM_D2_SUPPORTED = 64;
  PDCAP_WAKE_FROM_D3_SUPPORTED = 128;
  PDCAP_WARM_EJECT_SUPPORTED = 256;
  PDCAP_S0_SUPPORTED = 65536;
  PDCAP_S1_SUPPORTED = 131072;
  PDCAP_S2_SUPPORTED = 262144;
  PDCAP_S3_SUPPORTED = 524288;
  PDCAP_WAKE_FROM_S0_SUPPORTED = 1048576;
  PDCAP_WAKE_FROM_S1_SUPPORTED = 2097152;
  PDCAP_WAKE_FROM_S2_SUPPORTED = 4194304;
  PDCAP_WAKE_FROM_S3_SUPPORTED = 8388608;
  PDCAP_S4_SUPPORTED = 16777216;
  PDCAP_S5_SUPPORTED = 33554432;

// DEVICE_POWER_CAPABILITIES
pub const PDCAP_D0_SUPPORTED: u32 = 1;
pub const PDCAP_D1_SUPPORTED: u32 = 2;
pub const PDCAP_D2_SUPPORTED: u32 = 4;
pub const PDCAP_D3_SUPPORTED: u32 = 8;
pub const PDCAP_WAKE_FROM_D0_SUPPORTED: u32 = 16;
pub const PDCAP_WAKE_FROM_D1_SUPPORTED: u32 = 32;
pub const PDCAP_WAKE_FROM_D2_SUPPORTED: u32 = 64;
pub const PDCAP_WAKE_FROM_D3_SUPPORTED: u32 = 128;
pub const PDCAP_WARM_EJECT_SUPPORTED: u32 = 256;
pub const PDCAP_S0_SUPPORTED: u32 = 65536;
pub const PDCAP_S1_SUPPORTED: u32 = 131072;
pub const PDCAP_S2_SUPPORTED: u32 = 262144;
pub const PDCAP_S3_SUPPORTED: u32 = 524288;
pub const PDCAP_WAKE_FROM_S0_SUPPORTED: u32 = 1048576;
pub const PDCAP_WAKE_FROM_S1_SUPPORTED: u32 = 2097152;
pub const PDCAP_WAKE_FROM_S2_SUPPORTED: u32 = 4194304;
pub const PDCAP_WAKE_FROM_S3_SUPPORTED: u32 = 8388608;
pub const PDCAP_S4_SUPPORTED: u32 = 16777216;
pub const PDCAP_S5_SUPPORTED: u32 = 33554432;

const
  PDCAP_D0_SUPPORTED* = 1
  PDCAP_D1_SUPPORTED* = 2
  PDCAP_D2_SUPPORTED* = 4
  PDCAP_D3_SUPPORTED* = 8
  PDCAP_WAKE_FROM_D0_SUPPORTED* = 16
  PDCAP_WAKE_FROM_D1_SUPPORTED* = 32
  PDCAP_WAKE_FROM_D2_SUPPORTED* = 64
  PDCAP_WAKE_FROM_D3_SUPPORTED* = 128
  PDCAP_WARM_EJECT_SUPPORTED* = 256
  PDCAP_S0_SUPPORTED* = 65536
  PDCAP_S1_SUPPORTED* = 131072
  PDCAP_S2_SUPPORTED* = 262144
  PDCAP_S3_SUPPORTED* = 524288
  PDCAP_WAKE_FROM_S0_SUPPORTED* = 1048576
  PDCAP_WAKE_FROM_S1_SUPPORTED* = 2097152
  PDCAP_WAKE_FROM_S2_SUPPORTED* = 4194304
  PDCAP_WAKE_FROM_S3_SUPPORTED* = 8388608
  PDCAP_S4_SUPPORTED* = 16777216
  PDCAP_S5_SUPPORTED* = 33554432

enum DEVICE_POWER_CAPABILITIES : uint {
    PDCAP_D0_SUPPORTED = 1,
    PDCAP_D1_SUPPORTED = 2,
    PDCAP_D2_SUPPORTED = 4,
    PDCAP_D3_SUPPORTED = 8,
    PDCAP_WAKE_FROM_D0_SUPPORTED = 16,
    PDCAP_WAKE_FROM_D1_SUPPORTED = 32,
    PDCAP_WAKE_FROM_D2_SUPPORTED = 64,
    PDCAP_WAKE_FROM_D3_SUPPORTED = 128,
    PDCAP_WARM_EJECT_SUPPORTED = 256,
    PDCAP_S0_SUPPORTED = 65536,
    PDCAP_S1_SUPPORTED = 131072,
    PDCAP_S2_SUPPORTED = 262144,
    PDCAP_S3_SUPPORTED = 524288,
    PDCAP_WAKE_FROM_S0_SUPPORTED = 1048576,
    PDCAP_WAKE_FROM_S1_SUPPORTED = 2097152,
    PDCAP_WAKE_FROM_S2_SUPPORTED = 4194304,
    PDCAP_WAKE_FROM_S3_SUPPORTED = 8388608,
    PDCAP_S4_SUPPORTED = 16777216,
    PDCAP_S5_SUPPORTED = 33554432,
}

#define global PDCAP_D0_SUPPORTED           0x1
#define global PDCAP_D1_SUPPORTED           0x2
#define global PDCAP_D2_SUPPORTED           0x4
#define global PDCAP_D3_SUPPORTED           0x8
#define global PDCAP_WAKE_FROM_D0_SUPPORTED 0x10
#define global PDCAP_WAKE_FROM_D1_SUPPORTED 0x20
#define global PDCAP_WAKE_FROM_D2_SUPPORTED 0x40
#define global PDCAP_WAKE_FROM_D3_SUPPORTED 0x80
#define global PDCAP_WARM_EJECT_SUPPORTED   0x100
#define global PDCAP_S0_SUPPORTED           0x10000
#define global PDCAP_S1_SUPPORTED           0x20000
#define global PDCAP_S2_SUPPORTED           0x40000
#define global PDCAP_S3_SUPPORTED           0x80000
#define global PDCAP_WAKE_FROM_S0_SUPPORTED 0x100000
#define global PDCAP_WAKE_FROM_S1_SUPPORTED 0x200000
#define global PDCAP_WAKE_FROM_S2_SUPPORTED 0x400000
#define global PDCAP_WAKE_FROM_S3_SUPPORTED 0x800000
#define global PDCAP_S4_SUPPORTED           0x1000000
#define global PDCAP_S5_SUPPORTED           0x2000000
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